**Introduction**

Digital-to-Analog Converters (DACs) are fundamental components in the realm of digital electronics, serving as bridges between the digital and analog worlds. These devices convert digital signals, which are represented by binary numbers, into their analog counterparts, typically voltages or currents. The necessity for DACs arises in various applications, including audio playback, video processing, and digital signal synthesis, where analog signals are required for interaction with the physical world.

One of the critical limitations of Pulse Width Modulation (PWM) in synthesizing analog signals is its bandwidth constraint. While PWM is a versatile technique for creating an analog-like signal by varying the duty cycle of a digital pulse, its effectiveness diminishes at higher frequencies. This limitation is primarily due to the finite switching speeds of electronic components and the filtering requirements to extract the analog signal from the PWM waveform. As a result, for applications requiring precise control over high-frequency signals, DACs become indispensable.

**DAC Architectures Overview**

The design of a DAC significantly influences its performance characteristics, such as resolution, accuracy, speed, and complexity. In this exploration, we focus on three primary DAC architectures, each with its unique operational principles and applications.

**Resistor Voltage Divider DAC**: This architecture is arguably the most straightforward approach to digital-to-analog conversion. It utilizes a network of resistors arranged in a divider configuration, offering multiple output voltages at various nodes. By selectively connecting these nodes to the output through switches, a DAC is realized. The simplicity of this design makes it an excellent educational tool, though its scalability is limited by the exponential increase in the number of resistors and switches with the desired resolution.**Binary Weighted Resistor DAC**: Drawing inspiration from operational amplifier (OpAmp) circuits, this architecture employs resistors with binary-weighted values to convert digital codes to analog voltages. The resistors are connected to a summing amplifier, where each resistor represents a bit in the digital input code. The output voltage is a weighted sum of the inputs, effectively converting the binary input into an analog output. This method offers a more compact design compared to the resistor voltage divider, reducing the number of required resistors and switches. However, it faces challenges in resistor precision and range, which can affect the DAC's accuracy and linearity.**R-2R Ladder DAC**: The R-2R Ladder architecture is a refinement that addresses the scalability and precision issues of the previous designs. It consists of only two resistor values, R and 2R, arranged in a ladder network. This configuration allows for easy expansion of the DAC's resolution without significantly increasing complexity. The R-2R ladder's uniform structure simplifies the implementation and ensures consistent output impedance, making it a preferred choice for commercial and high-performance applications.

Each of these DAC architectures offers a unique balance of simplicity, accuracy, scalability, and cost, making them suitable for different applications and design considerations. In the following sections, we will delve into the theory behind each architecture, followed by practical experiments to illustrate their principles and applications.

**Standard resistors and DAC limitations**

Resistors don’t come in all shapes and sizes. Hop on to Mouser, Farnell, Digikey or whatever electronics supplier’s website you want and try to buy resistors for four bit binary weighted DAC. If you select R value to be 10 kOhm, you wont’t have any problems with 2R, but you won’t find a 40 kOhm resistor. Closest you can get is 40.2 kOhm. How about 8R? Nope, 79.6 kOhm is your closest match. Depending on how precise you want to be, such tolerances are OK, but usually they aren’t. Now let’s answer the question why can’t you buy any resistor you want? It has to do with tolerances. IF resistors are built with 10% tolerance, there is no reason to make standard values that are within 10% of one another. Manufacturers have agreed on making resistors in so called E series. One way to alleviate the problem with tolerances is to use trimmable resistors, but this tends to be expensive. A smarter approach is to use a bunch of resistors from the same batch, even better if they were produced one after another, and hope they have the same error, which will then cancel out.

**Binary weighted resistor DAC**

The binary weighted resistor DAC utilizes a clever method of representing binary codes through an analog voltage, fundamentally based on the principles of operational amplifiers (OpAmps) and resistor networks. This architecture hinges on the concept of analog addition, where each bit of the digital input is assigned a resistor whose value is inversely proportional to its significance in the binary code. The most significant bit (MSB) is matched with the lowest resistor value, and each subsequent bit is assigned a resistor value twice that of the previous, reflecting its halved significance in the binary number representation.

Remember the chapters about analog addition OpAmp amplifiers and? I do, so let’s draw some inspiration from those chapters.

$U_{OUT} = -(U_1 \cdot \frac{R_2}{R_1} + U_2 \cdot \frac{R_2}{R_3})$Adding more input voltages and input resistors would just extend the equation. If input voltages can be only Uref or 0V, and we fix resistor values, equation becomes even simpler. In this example b0 through b3 represent bits which control state of resistors. 1 means Uref, and 0 means 0V.

$U_{OUT} = - U_{ref} \cdot (b_0 + b_1 / 2 + n_2 / 4 + b_3 / 8) = -2 \cdot U_{ref} \cdot \frac{U_{4bit}}{16}$So in this setup we basically connect a binary code of desired voltage to inputs and bam, analog representation of digital code is generated. The x2 factor in equation is present because I wanted to emphasize that the output voltage in this configuration approaches 2xUref.

**Operation Principle**: The core of this DAC type is the summing amplifier, an OpAmp configuration that allows multiple input voltages to be added together to produce a single output voltage. In a binary weighted resistor DAC, the input voltages are either a reference voltage (representing a '1' bit) or ground (representing a '0' bit). The resistors' binary-weighted values ensure that each bit contributes a proportionally scaled amount to the final output voltage. This results in the output voltage being a direct analog representation of the input binary code.

**Challenges and Solutions**: The main challenge in designing a binary weighted resistor DAC lies in the precision and availability of resistor values. As the resolution increases, the required range of resistor values grows exponentially, making it difficult to source precise resistors for the higher bits. This issue can lead to inaccuracies and non-linearities in the DAC's output. One common solution is to use precision resistors with tight tolerances or employ trimming techniques to adjust the values of off-the-shelf resistors, thus mitigating the effects of component variances.

**R-2R**

The R-2R Ladder DAC represents a significant evolution in DAC design, addressing many of the scalability and precision issues found in other architectures. Its name derives from the network's composition of only two types of resistors: R and 2R, arranged in a ladder-like configuration. This simplification greatly eases the implementation and expansion of the DAC's resolution while maintaining consistent performance.

Instead of dedicating more time to obsolete or niche DAC architectures, let’s take a look at one that you can easily find used in commercial DACs. Here is how an R-2R resistor ladder looks like:

You will immediately notice that a R-2R resistor ladder consists of only two sizes of resistors, R and 2R. This also explains the network’s name. I skipped drawing switches for simplicity’s sake. In practice places marked with bits b0 through b4 would connect to GND or Uref. But how does this resistor ladder behave as a DAC? Depending on how trustworthy you consider me to be, you may accept my claim that output voltage is calculated as such:

$U_{out} = U_{ref} \cdot (b_0 /2 + b_1 / 4 + n_2 / 8 + b_3 / 16)$Or you can use superposition in conjunction with Thevenin’s theorem to verify my claim. A harder alternative would be to use superposition and brute force, but I won’t try to stop you. Unlike the binary-weighted DAC that we explored before, an R-2R network does not need an amplifier to output a voltage. Keep in mind though that a buffer is still required for driving low-impedance loads. In spite of that, we might sometimes want to use an amplifier. If we selected an inverting amplifier, knowing the network’s output resistance is essential. A nice property of an R-2R ladder: it “folds” down on itself.

As illustrated above, regardless of how many bits an R-2R network has, its output resistance is always R. A nice thing about this DAC architecture is that we can easily add or remove bits simply by adding or removing a pair of resistors. As explained just a moment ago, this doesn’t affect the rest of the circuit. AS such, we can easily add an amplifier to the circuit. The following schematic depicts an inverting amplifier with a gain of -1 added to an R-2R DAC. Note how the amplifier consists of only an OpAmp and one resistor with resistance R.

Another nice thing is that an R-2R DAC only requires N switches and 2N resistors of two sizes. By selecting R to be 10 kOhm, we can even obtain 2R (20 kOhm) from the standard set of resistors. Furthermore, R-2R ladders are so common that you can even buy a prebuilt network in a single component. They cost very little and may come in handy when we have enough free pins on a microcontroller. You don’t even need a special Uref, you can simply connect digital output pins to the inputs of a DAC and pretend that the supply voltage is stable enough to serve as a reference voltage. The same holds true for a binary-weighted DAC, but I see no reason why you would use that over a simple R-2R.

**Design and Operation**: In an R-2R ladder, each bit of the input digital code is connected to a switch that toggles between the reference voltage (for a '1' bit) and ground (for a '0' bit). The ladder network ensures that each bit contributes a successively halved portion of the reference voltage to the output, according to its position in the binary code. A notable advantage of this design is its inherent output resistance; regardless of the number of bits, the output resistance of an R-2R ladder network remains constant, a property that simplifies interfacing with subsequent stages.

**Amplification and Buffering**: Although an R-2R DAC can operate without an external amplifier, adding a buffer or an amplifier can enhance its performance, especially when driving low-impedance loads or when further signal processing is required. An amplifier can also be used to adjust the output voltage range or invert the signal if necessary.

**DAC Performance Factors**

The performance of a DAC is influenced by several key factors, each playing a crucial role in determining the quality and suitability of the DAC for a given application.

**Resolution**: Defined as the number of bits in the DAC's digital input, the resolution determines the smallest change in voltage that the DAC can produce, affecting the precision of the analog output.**Speed**: The speed of a DAC, often measured in terms of its settling time or update rate, indicates how quickly the output can accurately reflect a change in the input code. High-speed applications require DACs with fast settling times to ensure accurate signal reproduction.**Linearity**: A measure of how closely the DAC's output follows a straight line across its input range. Non-linearity can introduce distortion into the analog signal, affecting the fidelity of the conversion.

**Component Tolerances and Mitigation Strategies**: Variations in component values, due to manufacturing tolerances, can significantly impact the DAC's accuracy and linearity. Strategies to mitigate these effects include using components with tighter tolerances, implementing calibration procedures, and designing the DAC to minimize the sensitivity to component variances. For example, the inherent structure of the R-2R ladder DAC naturally reduces the impact of resistor variances, making it a robust choice for many applications.

**Extra credits**

You may have noticed that this course didn’t show any screen captures of how the constructed DACs perform. That is because looking at horizontal lines is boring. If you want to see those DACs in action, I invite you to try them out yourself. One more thing you can do is to determine the output voltages of DACs that I showed throughout this article. You may have noticed that the switches were marked so that you can see their state more easily.

**Conclusion**

And that brings us to the end. We set off to find a DAC that can be used for generating rapidly changing signals, which PWM could not handle. We explored three different architectures in order of rising complexity for understanding the principle of operation, but falling complexity of construction. With that said, I hope you learned something. Bye!

Written by Luka Pogačnik

This teaching material was created by Red Pitaya & Zavod 404 in the scope of the Smart4All innovation project.